Publications
International Journals
[1] M. Olivieri, F. Pappalardo and G. Visalli: Bus Switch Coding for reducing power dissipation in off-chip buses IEEE Transaction on Very Large Scale Integration Vol.12 No.12 December 2004
[2] M. Olivieri, F.Pappalardo, S. Smorfa and G.Visalli Analysis and Implementation of a novel Leading ZeroAnticipation Algorithm for Floating-Point Arithmetic Units IEEE Transaction on Circuits and Systems II Vol.54 No. 8 August 2007 pp. 685-689
[3] G. Visalli and E. Guidetti An Ultra-Low Power Data Aggregation Systems for Wireless Micro-Sensor Networks in American Scientific Publisher (ASP) Journal of low-power Electronics. Vol. 3 No 2 August 2007
[4] G. Visalli Fuzzy control of coding schemes for reducing energy dissipation in off-chip buses American Scientific Publisher (ASP) Journal of Low-Power Electronics, Vol. 4 No.2 August 2008
[5] G. Visalli "A Bus Switch Coding System with Minimal Hardware Demand", American Scientific Publisher (ASP) Journal of Low-Power Electronics, Vol. 8, No 4, pp. 415-423, August 2012
[6] G. Visalli "A low-power L1 cache design based on Data and Tag Remapping” ASP Journal of Low-Power Electronics, Vol. 9, No. 4, pp. 427-434 December 2013
[7] G. Visalli "Low Energy and Secure Aggregation of uncorrelated data in clustered sensor network” ASP Journal of Low-Power Electronics, Vol.13, No.3 September 2017
[8] G. Visalli "Analysis and Performance of Coded Symbol Recovery Loop Using Oversampling" EURASIP Journal on Advances in Signal Processing , April, 27th 2019
[9] G. Visalli "Upgrading an analog recovery loop for optimized decoding jointly to an increased data rate" Springer Journal of Telecommunication Systems June, 21st 2021
Conference Proceedings
[1] G. Visalli and F. Pappalardo "Low-Power Floating Point Encoding for Signal Processing Applications", In IEEE Workshop on Signal Processing Systems (SiPS-03), August 2003 Seoul, Korea.
[2] F. Pappalardo, G. Visalli and M. Scarana "An Application-Oriented Analysis of Power/Precision Trade-Off in Fixed and Floating-Point Arithmetic Units For VLSI Processors" In IASTED Conference on Circuits, Signals and Systems (CSS-04) 28-Nov,1-Dec 2004 Clearwater Beach (FL),USA.
[3] M. Olivieri, F. Pappalardo and G. Visalli "Encoding Circuits for Low-Power optical on-chip communications". In IEEE International Symposium on Circuit and Systems (ISCAS-05) 23-26May 2005 Kobe, Japan.
[4] M. Olivieri, F. Pappalardo and G. Visalli "A Statistical Analysis, for reducing the energy dissipation in a Bus-Switch Encoder" In IASTED Conference on Circuits, Signals and Systems (CSS-05)Marina del Rey (CA), USA
[5] M. Olivieri, F. Pappalardo and G. Visalli "Design Issues for Bus-Switch Systems in Deep Sub-Micrometric CMOS Technologies" In IASTED Conference on Circuits, Signals and Systems (CSS-05)Marina del Rey (CA), USA
[6] M. Olivieri, F. Pappalardo and G. Visalli "Performance -Timing Overhead Trade-off Analysis for a low-power data bus encoding based on input lines reordering" In IEEE Industrial Electronic Conference (IECON-05) Raleigh (NC), USA
[7] G. Visalli, "UVM-based Verification of ECC Module for Flash Memories” In IEEE European Circuit Theory and Design Conference (ECCTD-17), Catania, Italy, 4-6 September 2017.
Other Publications
[P1] F. Pappalardo, L. Mantellassi, F Mammoliti, G. Visalli “Power Conscious Design Flow for SoC Design based on Physical Synthesis”, Synopsys User Group 7-8 March 2002, Paris.
[P2] E. Guidetti, B. Kraabol, F. Pappalardo, G. Visalli “Gate Level Power Estimation by RTL activity file completion” Synopsys User Group 6-7 March 2003, Munich
[P3] G. Visalli and F. Pappalardo “A Low Power Floating-Point Multiplier for Signal Processing Applications” Synopsys User Group 6-7 May 2004, Munich
[P4] M. Olivieri G. Visalli and F. Pappalardo “Bus-Switch Coding for dynamic power management in off-chip communication channels” Synopsys User Group 4-5 May 2005, Munich